mx7dsabresd: Set VLD04 output to 2.8V in PMIC initialization.

This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.

Signed-off-by: Gautam Bhat <[email protected]>
Acked-by: Fabio Estevam <[email protected]>

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index ecea5a529aa8f560ac70f5a53f54a92ee55af8ad..7d22501d269b459e2827100a430d12dad7da399c 100644 (file)
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -354,6 +354,12 @@ int power_init_board(void)
 
        pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
 
+       /*
+        * Set the voltage of VLDO4 output to 2.8V which feeds
+        * the MIPI DSI and MIPI CSI inputs.
+        */
+       pmic_clrsetbits(dev, PFUZE3000_VLD4CTL, 0xF, 0xA);
+
        return 0;
 }
 #endif